1. Field of the Invention
This invention is in the field of input structures for electronic systems and, more particularly, is a robust LC full-wave bridge rectifier input structure implementing minimized gain parasitic transistors.
2. Description of the Related Art
Full-Wave Bridge Rectifier (hereafter "FWBR") input structures are well known to those skilled in the art. Moreover, those skilled in the art know that the return flow path for a FWBR input structure is typically, or at least ideally, comprised of pair of diodes (i.e., one diode per return flow path). When such an FWBR input structure is implemented into an integrated circuit, one problem inherent with prior designs prompted the instant invention. In particular, it is the creation of a parasitic Bipolar Junction Transistor (hereafter "BJT") in each return flow path for the FWBR input structure. Here, the term of art, "parasitic," refers to an element that is unwanted, but nonetheless there. In the FWBR input structures of interest here, using a diode in each return flow path causes the creation--albeit undesirable, but also unavoidable--of a parasitic BJT in each return flow path. Thus, an unwanted (i.e., parasitic) BJT is formed in each return flow path for the FWBR input structure, and the particulars of how this occurs is discussed below.
Assuming the integrated circuit containing the FWBR input structure has a P-type substrate, an n.sup.+ material is situated into the substrate, which is generally tied to ground, in order to form a diode. Somewhere else on the integrated circuit's substrate, one will typically have another region of n.sup.+ material associated with another component, and this other region of n.sup.+ material may be tied to a supply voltage VDD. If that is the case, then although the desire was to establish a diode return flow path for the FWBR input structure, in essence, a parasitic NPN BJT was formed. The n.sup.+ material for the diode corresponds to the emitter for the parasitic NPN BJT, while the other n.sup.+ material tied to VDD corresponds to the collector for the parasitic NPN BJT, and the base corresponds to the grounded P-type substrate. Even though it was not intended to have a BJT for the FWBR input structure, the creation of the return flow path diode causes the formation of the parasitic BJT, and this results in problems.
Specifically, when the base to emitter junction of the parasitic BJT is forward biased (e.g. when this particular return flow path for the FWBR input structure is used), the parasitic BJT draws current from its collector, and ultimately from VDD. Now, if the power supply for VDD is limited, such as if a small battery, capacitor, or the like is used, then sustaining power could be a problem. In particular, the aforementioned collector drawing on VDD (i.e., on the applicable power storage device) can either limit the ability to charge the applicable power storage device or prematurely discharge it. Note that there would be a parasitic BJT, and its associated power drawing problems just discussed, for each diode in the FWBR input structure (i.e., generally, one per return flow path).
Therefore, there existed a need to provide an improved integrated circuit FWBR input structure having parasitic BJTs of minimized gain.